Design of Low Power Asynchronous Viterbi Decoder for Wireless Communication |
Author(s): |
| Piyush S.Varadpande , SINHGAD COLLEGE OF ENGINEERING; Madan B. Mali, SCOE |
Keywords: |
| VHDL, Asynchronous Viterbi decoder |
Abstract |
|
Convolutional codes are mainly used in channel coding techniques, and because of high performance, Viterbi decoder is widely used in decoders. Also fast developments in communication field have created rising demand for low power, high speed and low weight Viterbi decoders. Though there is significant growth in past few years but still problem of power dissipation in Viterbi decoders remained challenge and requires further technical solution. The aim of this project is to reduce the dynamic power consumption bellow 10 mW Asynchronous Technique is a technique where handshaking signal are used to communicate between blocks. The asynchronous design is inherently data driven and active while doing useful work where power saving with acceptable speed penalty is obtained. Xpower analyzer tool is used to measure power consumption. Therefore, the designed method is of low power consumption of Viterbi decoder for the rate of r=1/2, with a constraint length K = 3 using asynchronous technique. |
Other Details |
|
Paper ID: IJSRDV3I50136 Published in: Volume : 3, Issue : 5 Publication Date: 01/08/2015 Page(s): 147-150 |
Article Preview |
|
|
|
|
