Design and Analyze High Speed, Power Efficient BCD Adder using Digital Logic Technique |
Author(s): |
| Namrata Vinayak Bhadade , G H Raisoni Academy of Engineering and Technology; Amol K. Boke, G H Raisoni Academy of Engineering and Technology |
Keywords: |
| Full Adder, 4 Bit Binary Adder, BCD Adder, MTCMOS, TG, GDI |
Abstract |
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This paper proposed the design of high speed BCD adder using digital logic technique. An adder is a digital circuit that performs addition of numbers. The adder is one of the most critical components of a processor. Adders are used not only in the arithmetic logic unit (ALU), but also in other parts of the processor. The BCD adder is designed using transmission gate (TG), Multiple Threshold CMOS (MTCMOS) and Gate Diffusion Input (GDI) technique on Tanner SPICE simulation. Performance evaluation of design using recent logic techniques and their respective obtained parameter will give most efficient technique to implement BCD adder for respective parameter. |
Other Details |
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Paper ID: IJSRDV3I50185 Published in: Volume : 3, Issue : 5 Publication Date: 01/08/2015 Page(s): 200-203 |
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