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A Survey of functional verification techniques


Aartika Bansal , PEC University of Technology; Nagendra Sah, PEC University of Technology; Anantharaj T.V., SanDisk


Functional verification, simulation, formal methodology, hybrid techniques


In this paper, we present a survey of various techniques used in functional verification of industry hardware designs. Although the use of formal verification techniques has been increasing over time, there is still a need for an immediate practical solution resulting in an increased interest in hybrid verification techniques. Hybrid techniques combine formal and informal (traditional simulation based) techniques to take the advantage of both the worlds. A typical hybrid technique aims to address the verification bottleneck by enhancing the state space coverage.

Other Details

Paper ID: IJSRDV3I100325
Published in: Volume : 3, Issue : 10
Publication Date: 01/01/2016
Page(s): 512-516

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